Physical Design Engineer

We are seeking a highly skilled and motivated Senior Engineer to lead end-to-end testchip design and execution for advanced process technology nodes. This is a hands-on technical leader role that combines deep expertise in design rule validation, test structure design, and layout execution with strong cross-functional collaboration and program management capabilities.

Drive testchip execution end-to-end by owning the overall schedule across multiple component blocks, serving as the primary accountability owner for quality and delivery through Tape-In while providing hands-on technical guidance to the team.

Apply deep design rule and runset expertise to interpret design rules on advance design process, defining comprehensive test structure requirements and collaborating with yield and process teams to drive iterative design loops to full specification compliance.

Own the full-flow layout execution across all cell heights and layers, from environment setup and test structure layout design through DRC-clean sign-off, enforcing clear quality gates at each stage.

Deliver integration and Tape-In on schedule by driving Testrow Integration covering generation, fill, design checks, and signal plot verification, ensuring all content check-in and health checks are completed before final Tape-In handoff.

Define and deploy an automation and AI strategy targeting repetitive execution tasks — DRC runs, layout automation, test structure validation, and reporting — leveraging AI tools and building agents where applicable to accelerate execution throughput and reduce manual intervention.

Lead cross-site collaboration and communication as the key technical interface between design, yield, process, and integration teams across distributed sites, aligning on specifications, schedules, and priorities while communicating proactively in all directions.

Mentor and grow the team by coaching junior and mid-level engineers on design rule interpretation, test structure methodology, and execution best practices, setting clear expectations and actively raising the technical bar across the group.